APL datasheet, APL circuit, APL data sheet: ANPEC – V Reference Ultra Low Dropout ([email protected]) Linear Regulator,alldatasheet, datasheet. APL datasheet, APL circuit, APL data sheet: ANPEC – V Reference Ultra Low Dropout (V5A) Linear Regulator,alldatasheet, datasheet . APL中文资料_电子/电路_工程科技_专业资料。2b. com APL V Reference Ultra Low Dropout ([email protected]) Linear Regulator.
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Ultra Low Dropout – 0.
This product is specifically designed to pal well supply voltage for front-side-bus termination on motherboard and NB applications. The IC needs two supply voltages, a control voltage for the circuitry and a main supply volatege for power conversion, to reduce power dissipation and provide extremely low dropout.
APL Datasheet(PDF) – Anpec Electronics Coropration
The APL integrates many functions. A thermal shutdown and current limit functions protect the device against thermal and current over-loads.
A POK indicates the output status with time delay which is set internally. It can control other converter for power sequence.
10pcs APL5912KAC APL5912 SOP-8
The APL can be enabled by other power system. Pulling and holding the EN pin below 0. Lead Free Device Blank: Refer to the typical application circuit.
Output Current Dropout Voltage vs. Amplitude dB Frequency Hz Frequency Hz Copyright? Load transient Response 1. All voltage levels are measured with respect to this pin. FB Pin 2 Connecting this pin to an external resistor divider receives the feedback voltage of the 9512. The output voltage set by the resistor divider is determined by: A bypass capacitor may be connected with R1in parallel to improve load transient response. Please connect Pin 3 and 4 together using wide tracks.
It is necessary to connect a output capacitor with this 59122 for closed-loop compensation and improving transient responses. The Exposed Pad provide a very low impedance input path for the main supply voltage.
The voltage apo this pins is monitored for PowerOn Reset purpose.
The voltage at this pin is monitored for Power-On Reset purpose. This pin is an open-drain output used to indicate status of output voltage by sensing FB voltage.
1 PCS New APLKAC-TRL APL SOP-8 IC chip | eBay
EN Pin 8 Enable control pin. Pulling and holding this pin below 0. When re-enabled, the IC undergoes a new soft-start cycle. Left this pin open, an internal current source 10? The POR function initiates a soft-start process after the two supply voltages exceed their rising POR threshold voltages during powering on. Internal Soft-Start An internal soft-start function controls rise rate of the output voltage to limit the current surge at start-up.
The typical soft-start interval is about 2mS. Output Voltage Regulation An error amplifier working with a temperature-compensated 0. The error amplifier designed with Copyright? Output Voltage Regulation Cont. Therefore the UVP is disable during soft-start. When the voltage on FB pin falls below the under-voltage threshold, the UVP circuit shuts off the output immediately. After a while, the APL starts a new soft-start to regulate output.
APL5912KAC-TRG APL5912 SOP-8
The regulator regulates the output again through initiation 59112 a new softstart cycle after the junction temperature cools by 50oC, resulting in a pulsed output during continuous thermal overload conditions.
The thermal shutdown designed with a 50oC hysteresis lowers the average junction temperature during continuous thermal overload conditions, extending life time of the device. Following a shutdown, a logic high signal re-enables the output through initiation of a new alp cycle. Left open, this pin is pulled up by an internal current source 10? A typical ap enable operation. The reason is the internal parasitic diode from VOUT to Apll conducts and dissipates power without protections 55912 to the forward-voltage.
The output capacitor selection is to select proper ESR equivalent series resistance and capacitance of the output capacitor for app stability and load transient response. The APL is designed with a programmable feedback compensation adjusted by an external feedback network for the use of wide ranges of ESR and capacitance in all applications.
The value of the output capacitors can be increased without limit. During load transients, the output capacitors, depending on the stepping amplitude and slew rate of load current, are used to reduce the slew rate of the current seen by the APL and help the device to minimize the variations of output voltage for good transient response.
For the applications with large stepping load current, the low-ESR bulk capacitors are normally recommended. Decoupling ceramic capacitors must be placed at the load and ground pins as close as possible and the impedance of the layout must be minimized. Input Capacitor The APL requires proper input capacitors to supply current surge during stepping load transients to prevent the input rail from dropping.
Because the parasitic inductor from the voltage sources or other bulk capacitors to the VIN pin limit the slew rate of the surge currents.
More parasitic inductance needs more input capacitance. Ultra-low-ESR capacitors, such as ceramic chip capacitors, are very good for the input capacitors. It is not necessary to use low-ESR capacitors.
More capacitance reduce the variations of the input voltage of VIN pin. It works with the internal error amplifier to provide proper frequency response for 591 linear regulator. The ESR is the equivalent series resistance of the output capacitor. The COUT is ideal capacitance in the output capacitor. The VOUT is the setting of the output voltage.
Select a proper R1 selected to be a little larger than the calculated R1. The main current flow is through the exposed pad. The role of VIN is a voltage sense. Refer Figure 3 to make a proximate topology. Ceramic decoupling capacitors for load must be placed near the load as close as possible. To place APL and output capacitors near the load is good for performance. The negative pins of the input and output capacitors and the GND pin of the APL are connected to the ground plane of the alp.
Please connect PIN 3 and 4 together by a wide track or plane on the Top layer. Large current paths must have wide tracks. Ceramic Capacitors – Calculate the R1 as the following: The minimum selected R1 is equal to 1k?
The reason to have three conditions described above is to optimize the load transient responses for all kinds of the output capacitor. For stability only, the Condition 2, regardless of equation 5is enough for all kinds of output capacitor.
Thermal Considerations See Figure 3. The SOPP is a cost-effective package featuring a small size like a standard SOP-8 and a bottom exposed pad to minimize the thermal resistance of the package, spl applicable to high current applications.
The exposed pad must be soldered to the top VIN plane. Please enlarge the area to reduce the case-to-ambient resistance? All temperatures refer to topside of the package. Measured on the body surface.